38.7.1 Control A

Name: CTRLA
Offset: 0x00
Reset: 0x00
Property: PAC Write-Protection, Write-Synchronized Bits

Bit 76543210 
 MODE    RUNSTDBYENABLESWRST 
Access R/WR/WR/WR/W 
Reset 0000 

Bit 7 – MODE Operating Mode

This bit defines the operating mode of the USB.

ValueDescription
0 USB Device mode
1 USB Host mode

Bit 2 – RUNSTDBY Run in Standby Mode

This bit is Enable-Protected.

ValueDescription
0 USB clock is stopped in standby mode.
1 USB clock is running in standby mode

Bit 1 – ENABLE Enable

Note: This bit is write-synchronized: SYNCBUSY.ENABLE must be checked to ensure the CTRLA.ENABLE synchronization is complete.
ValueDescription
0 The peripheral is disabled or being disabled.
1 The peripheral is enabled or being enabled.

Bit 0 – SWRST Software Reset

Writing a zero to this bit has no effect.

Writing a '1' to this bit resets all registers in the USB, to their initial state, and the USB will be disabled.

Writing a '1' to CTRLA.SWRST will always take precedence, meaning that all other writes in the same write-operation will be discarded.

Note:
  1. When the CTRLA.SWRST is written, the user must poll SYNCBUSY.SWRST bit to know when the reset operation is complete.
  2. During a SWRST, access to registers/bits without SWRST are disallowed until SYNCBUSY.SWRST is cleared by hardware.
ValueDescription
0 There is no reset operation ongoing.
1 The reset operation is ongoing.