20.7 Register Summary

Refer to the Registers Description section for more details on register properties and access permissions.

OffsetNameBit Pos.76543210
0x00EVCTRL7:0     TUNEINVTUNEEICFDEO

0x01

...

0x03

Reserved         
0x04INTENCLR31:24   DFLLRCSDFLLLCKCDFLLLCKFDFLLOOBDFLLRDY
23:16    DPLLLDRTODPLLLTODPLLLCKFDPLLLCKR
15:8     DFLLULPNOLOCKDFLLULPLOCKDFLLULPRDY
7:0   OSC16MRDY  XOSCFAILXOSCRDY
0x08INTENSET31:24   DFLLRCSDFLLLCKCDFLLLCKFDFLLOOBDFLLRDY
23:16    DPLLLDRTODPLLLTODPLLLCKFDPLLLCKR
15:8     DFLLULPNOLOCKDFLLULPLOCKDFLLULPRDY
7:0   OSC16MRDY  XOSCFAILXOSCRDY
0x0CINTFLAG31:24   DFLLRCSDFLLLCKCDFLLLCKFDFLLOOBDFLLRDY
23:16    DPLLLDRTODPLLLTODPLLLCKFDPLLLCKR
15:8     DFLLULPNOLOCKDFLLULPLOCKDFLLULPRDY
7:0   OSC16MRDY  XOSCFAILXOSCRDY
0x10STATUS31:24   DFLLRCSDFLLLCKCDFLLLCKFDFLLOOBDFLLRDY
23:16    DPLLLDRTODPLLLTODPLLLCKFDPLLLCKR
15:8     DFLLULPNOLOCKDFLLULPLOCKDFLLULPRDY
7:0   OSC16MRDY XOSCCKSWXOSCFAILXOSCRDY
0x14XOSCCTRL15:8STARTUP[3:0]AMPGCGAIN[2:0]
7:0ONDEMANDRUNSTDBY SWBENCFDENXTALENENABLE 
0x16CFDPRESC7:0     CFDPRESC[2:0]

0x17

Reserved         
0x18OSC16MCTRL7:0ONDEMANDRUNSTDBY  FSEL[1:0]ENABLE 

0x19

...

0x1B

Reserved         
0x1CDFLLULPCTRL15:8     DIV[2:0]
7:0ONDEMANDRUNSTDBYDITHERSAFEBINSEReservedENABLE 
0x1EDFLLULPDITHER7:0 PER[2:0] STEP[2:0]
0x1FDFLLULPRREQ7:0RREQ       
0x20DFLLULPDLY31:24        
23:16        
15:8        
7:0DELAY[7:0]
0x24DFLLULPRATIO31:24        
23:16        
15:8     RATIO[10:8]
7:0RATIO[7:0]
0x28DFLLULPSYNCBUSY31:24        
23:16        
15:8        
7:0    DELAYReservedENABLE 

0x2C

...

0x2F

Reserved         
0x30DFLLCTRL15:8    WAITLOCKBPLCKCQLDISCCDIS
7:0ONDEMANDRUNSTDBYUSBCRMLLAWSTABLEMODEENABLE 

0x32

...

0x33

Reserved         
0x34DFLLVAL31:24DIFF[15:8]
23:16DIFF[7:0]
15:8COARSE[5:0]FINE[9:8]
7:0FINE[7:0]
0x38DFLLMUL31:24CSTEP[5:0]FSTEP[9:8]
23:16FSTEP[7:0]
15:8MUL[15:8]
7:0MUL[7:0]
0x3CDFLLSYNC7:0READREQ       

0x3D

...

0x3F

Reserved         
0x40DPLLCTRLA7:0ONDEMANDRUNSTDBY    ENABLE 

0x41

...

0x43

Reserved         
0x44DPLLRATIO31:24        
23:16    LDRFRAC[3:0]
15:8    LDR[11:8]
7:0LDR[7:0]
0x48DPLLCTRLB31:24     DIV[10:8]
23:16DIV[7:0]
15:8   LBYPASS LTIME[2:0]
7:0  REFCLK[1:0]WUFLPENFILTER[1:0]
0x4CDPLLPRESC7:0      PRESC[1:0]

0x4D

...

0x4F

Reserved         
0x50DPLLSYNCBUSY7:0    DPLLPRESCDPLLRATIOENABLE 

0x51

...

0x53

Reserved         
0x54DPLLSTATUS7:0      CLKRDYLOCK