10.2.1.2 SAM L11 User Row

Table 10-10. SAM L11 UROW Bitfields Definition
Bit Pos.NameUsage

Factory Setting

Related Peripheral Register

2:0SULCKNVM Secure Region UnLock Bits 0x7 NVMCTRL.SULCK
5:3NSULCKNVM Non-Secure Region UnLock Bits 0x7 NVMCTRL.NSULCK
6ReservedReservedReserved Reserved
12:7BOD33_LEVELBOD33 threshold level at power-on.0x6SUPC.BOD33
13BOD33_DISBOD33 Disable at power-on0x0SUPC.BOD33
15:14BOD33_ACTIONBOD33 Action at power-on0x1SUPC.BOD33
24:16BOD12 Calibration ParametersDo not change(See Note 1 under Caution)0x08FReserved
25WDT_RUNSTDBYWDT Runstdby at power-on0x0WDT.CTRLA
26WDT_ENABLEWDT Enable at power-on0x0WDT.CTRLA
27WDT_ALWAYSONWDT Always-On at power-on0x0WDT.CTRLA
31:28WDT_PERWDT Period at power-on0xBWDT.CONFIG
35:32WDT_WINDOWWDT Window mode time-out at power-on0xBWDT.CONFIG
39:36WDT_EWOFFSETWDT Early Warning Interrupt Time Offset at power-on0xBWDT.EWCTRL
40WDT_WENWDT Timer Window Mode Enable at power-on0x0WDT.CTRLA
41BOD33_HYSTBOD33 Hysteresis configuration at power-on0x0SUPC.BOD33
42ReservedReserved ReservedReserved
43RXNRAM is eXecute Never 0x1IDAU.SECCTRL
44DXNData Flash is eXecute Never0x1NVMCTRL.SECCTRL
63:45ReservedReservedReservedReserved
71:64ASSecure Flash (AS region) Size = AS*0x100(5)0xFFIDAU.SCFGA
77:72ANSCNon-Secure Callable Flash (APPLICATION region) Size = ANSC*0x200x0IDAU.SCFGA
79:78ReservedReservedReservedReserved
83:80DSSecure Data Flash Size = DS*0x1000x8IDAU.SCFGA
87:84ReservedReservedReservedReserved
94:88RSSecure SRAM Size = RS*0x800x7FIDAU.SCFGR
95ReservedReservedReservedReserved
96URWENUser Row Write Enable0x1NVMCTRL.SCFGAD
127:97ReservedReservedReservedReserved
159:128NONSECA(1)Peripherals Non-Secure Status Fuses for Bridge A 0x0000_0000PAC.NONSECA
191:160NONSECB(2, 3)Peripherals Non-Secure Status Fuses for Bridge B 0x0000_0000PAC.NONSECB
223:192NONSECCPeripherals Non-Secure Status Fuses for Bridge C 0x0000_0000PAC.NONSECC
255:224USERCRCCRC of NVM User Row bits 223:640x8433651E(4)Boot ROM
Note:
  1. The PAC Peripheral is always secured regardless of its bit value
  2. The IDAU and NVMCTRL peripherals are always secured regardless of their bit values.
  3. The DSU peripheral is always non-secured regardless of its bit value.
  4. USERCRC value after a ChipErase_ALL (CE2) is 0x3389CD7C.
  5. Secure Flash (AS region) = Secure Flash (APPLICATION region) + Non-Secure Callable Flash (APPLICATION region)
CAUTION:
  1. BOD12 is calibrated in production and its calibration parameters must not be changed to ensure the correct device behavior.
Table 10-11. SAM L11 UROW Mapping
OffsetBit

Pos.

Name
0x007:0BOD33_LEVEL-NSULCKSULCK
0x0115:8BOD33_ACTIONBOD33_DISBOD33_LEVEL
0x0223:16BOD12 Calibration Parameters
0x0331:24WDT_PERWDT_ALWAYSONWDT_ENABLEWDT_RUNSTDBYBOD12 Calibration Parameters
0x0439:32WDT_EWOFFSETWDT_WINDOW
0x0547:40ReservedDXNRXNReservedBOD33_HYSTWDT_WEN
0x0655:48Reserved
0x0763:56Reserved
0x0871:64AS
0x0979:72ReservedANSC
0x0A87:80ReservedDS
0x0B95:88ReservedRS
0x0C103:96ReservedURWEN
0x0D-0xF127:104Reserved
0x10-0x13159:128NONSECA
0x14-0x17191:160NONSECB
0x18-0x1B223:192NONSECC
0x1C-0x1F255:224USERCRC