32.8.16 Interrupt Enable Set

This register allows the user to enable an interrupt without doing a read-modify-write operation. Changes in this register will also be reflected in the Interrupt Enable Clear register (INTENCLR).
Name: INTENSET
Offset: 0x64
Reset: 0x00000000
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
        NSCHK 
Access RW/RW/RW 
Reset 0 

Bit 0 – NSCHK Non-Secure Check Interrupt Enable

Writing '0' to this bit has no effect.


Writing '1' to this bit will set the Non-Secure Check Interrupt Enable bit, which enables the Non-Secure Check interrupt.

ValueDescription
0 The Non-Secure Check interrupt is disabled.
1 The Non-Secure Check interrupt is enabled.