41.8.18 Debug Control

Name: DBGCTRL
Offset: 0x1C
Reset: 0x00
Property: PAC Write-Protection

Bit 76543210 
        DBGRUN 
Access R/W 
Reset 0 

Bit 0 – DBGRUN Debug Run

This bit is not reset by a software reset.

This bit controls the functionality when the CPU is halted by an external debugger.

This bit should be written only while a conversion is not ongoing.

ValueDescription
0 The ADC is halted when the CPU is halted by an external debugger.
1 The ADC continues normal operation when the CPU is halted by an external debugger.