28.1.2.1 Enabling the Receiver
The EUSART receiver is enabled for asynchronous operation by configuring the following three control bits:
- CREN bit in the RCxSTA register is set to ‘
1’ to enables the receiver circuitry of the EUSART - SYNC bit in the TXxSTA register is set to ‘
0’ to configure the EUSART for asynchronous operation - SPEN bit in the RCxSTA register is set to ‘
1’ to enable the EUSART interface
All other EUSART control bits are assumed to be in their default state.
The user must set the RXxPPS register to select the RXx/DTx I/O pin and set the corresponding TRIS bit to configure the pin as an input.
Important: If the RX/DT function is on an analog pin, the
corresponding ANSEL bit must be cleared for the receiver to function.