29.9.6 SSPxCON2
Note:
- The value that will be transmitted when the user initiates an Acknowledge sequence at the end of a receive.
- If the I2C module is active, these bits may not be set (no spooling) and the SSPxBUF may not be written (or writes to the SSPxBUF are disabled).
| Name: | SSPxCON2 |
| Address: | 0x191,0x19B |
Control Register for I2C Operation Only
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| GCEN | ACKSTAT | ACKDT | ACKEN | RCEN | PEN | RSEN | SEN | ||
| Access | R/W | R/W/HC | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – GCEN
| Value | Name | Description |
|---|---|---|
x |
Host mode | Don’t care |
1 |
Client mode | General call is enabled |
0 |
Client mode | General call is not enabled |
Bit 6 – ACKSTAT Acknowledge Status bit (Host Transmit mode only)
| Value | Description |
|---|---|
1 |
Acknowledge was not received from client |
0 |
Acknowledge was received from client |
Bit 5 – ACKDT
| Value | Description |
|---|---|
1 |
Not Acknowledge |
0 |
Acknowledge |
Bit 4 – ACKEN
| Value | Description |
|---|---|
1 |
Initiates Acknowledge sequence on SDAx and SCLx pins, and transmits ACKDT data bit; automatically cleared by hardware |
0 |
Acknowledge sequence is Idle |
Bit 3 – RCEN
| Value | Description |
|---|---|
1 |
Enables Receive mode for I2C |
0 |
Receive is Idle |
Bit 2 – PEN
| Value | Description |
|---|---|
1 |
Initiates Stop condition on SDAx and SCLx pins; automatically cleared by hardware |
0 |
Stop condition is Idle |
Bit 1 – RSEN
| Value | Description |
|---|---|
1 |
Initiates Repeated Start condition on SDAx and SCLx pins; automatically cleared by hardware |
0 |
Repeated Start condition is Idle |
Bit 0 – SEN
| Value | Description |
|---|---|
1 |
Initiates Start condition on SDAx and SCLx pins; automatically cleared by hardware |
0 |
Start condition is Idle |