18.6.4 T0CON1

Timer0 Control Register 1

Name:	T0CON1
Address:	0x59F


Bit	7	6	5	4	3	2	1	0
	T0CS[2:0]			T0ASYNC	T0CKPS[3:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 7:5 – T0CS[2:0] Timer0 Clock Source Select

Table 18-1. Timer0 Clock Source Selections
T0CS	Clock Source
`111`	CLC1_out
`110`	SOSC
`101`	MFINTOSC(500 kHz)
`100`	LFINTOSC
`011`	HFINTOSC
`010`	F_OSC/4
`001`	Pin selected by T0CKIPPS (Inverted)
`000`	Pin selected by T0CKIPPS (Noninverted)

Bit 4 – T0ASYNC TMR0 Input Asynchronization Enable

Value	Description
`1`	The input to the TMR0 counter is not synchronized to system clocks
`0`	The input to the TMR0 counter is synchronized to F_OSC/4

Bits 3:0 – T0CKPS[3:0] Prescaler Rate Select

Value	Description
`1111`	1:32768
`1110`	1:16384
`1101`	1:8192
`1100`	1:4096
`1011`	1:2048
`1010`	1:1024
`1001`	1:512
`1000`	1:256
`0111`	1:128
`0110`	1:64
`0101`	1:32
`0100`	1:16
`0011`	1:8
`0010`	1:4
`0001`	1:2
`0000`	1:1

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