37.2.7.2 Supported CCCs

When the Target receives a CCC from the Controller, the CCC code is stored in the I3CxCCC register. In addition, SCCCIF and UCCCIF interrupt flags are also set depending on whether the received CCC is supported or unsupported. The interrupt flags are set for all Broadcast CCCs and only for those Direct CCCs for which an address match occurs.
Important: The SADRIF and DADRIF address match flags are not set for CCC Transactions.
Tip: The user can use the CCC code stored in the I3CxCCC register in conjunction with UCCCIF interrupt flag to provide custom firmware support for unsupported CCCs.
Table 37-11. List of Supported Common Command Codes (CCC)
Common Command Code (CCC)TypeValueBrief Description
ENECEnable Events CommandBroadcast Write0x00Enable Target events such as Hot-Join and In-Band Interrupt (I3CxEC)
Direct Write0x80
DISECDisable Events CommandBroadcast Write0x01Disable Target events such as Hot-Join and In-Band Interrupt (I3CxEC)
Direct Write0x81
ENTDAAEnter Dynamic Address AssignmentBroadcast Write0x07Enter Controller initiation of Dynamic Address Assignment Procedure
RSTDAAReset Dynamic Address AssignmentBroadcast Write0x06Discard current Dynamic Address and wait for new assignment
Direct Write(1)0x86
SETNEWDASet New Dynamic AddressDirect Write0x88Controller assigns new Dynamic Address to a Target
GETPIDGet Provisional IDDirect Read0x8DController queries Target’s Provisional ID (I3CxPID0 through I3CxPID5)
GETDCRGet Device Characteristics RegisterDirect Read0x8FController queries Target’s Device Characteristics Register (I3CxDCR)
GETBCRGet Bus Characteristics RegisterDirect Read0x8EController queries Target’s Bus Characteristics Register (I3CxBCR)
GETSTATUSGet Device StatusDirect Read0x90Controller queries Target’s operating status (I3CxDSTAT0 and I3CxDSTAT1)
RSTACTTarget Reset ActionBroadcast Write0x2AController configures and/or queries Target Reset action and timing (I3CxRSTACT)
Direct Write and Read0x9A
SETMRLSet Maximum Read LengthBroadcast Write0x0AController sets maximum read length (I3CxMRL) and IBI payload size (I3CxIBIPSZ)
Direct Write0x8A
SETMWLSet Maximum Write LengthBroadcast Write0x09Controller sets maximum write length (I3CxMWL)
Direct Write0x89
GETMRLGet Maximum Read LengthDirect Read0x8CController queries Target’s maximum possible read length (I3CxMRL) and IBI payload size (I3CxIBIPSZ)
GETMWLGet Maximum Write LengthDirect Read0x8BController queries Target’s maximum possible write length (I3CxMWL)
GETMXDSGet Maximum Data SpeedDirect Read0x94Controller queries Target’s maximum read and write data speeds (I3CxMRS, I3CxMWS) and maximum read turnaround time (I3CxMRT)
SETBUSCONSet Bus ContextBroadcast Write0x0CController specifies a higher-level protocol and/or I3C specification version (I3CxBUSCXT)
Note:
  1. Direct RSTDAA CCC is not supported by MIPI I3C® Specification v1.1 onwards. Controllers adhering to MIPI I3C® Specification v1.0 are not recommended to use Direct RSTDAA CCC even though this Target module supports it.