37.4.34 I3CxBCR

Note:
  1. This is a hard-coded read-only bit. This module only supports Target mode, so the BCR[7:6] bits will always read 0b00.
  2. This is a hard-coded read-only bit. This device has other communication peripherals outside of I3C making it a bridge-capable device, so the BCR4 bit will always read ‘1’.
  3. This is a hard-coded read-only bit. This Target module can be turned off or disabled, so the BCR3 bit will always read ‘1’.
  4. This is a hard-coded read-only bit. This Target module supports In-Band Interrupt requests with Mandatory Data Byte and additional payload, so both the BCR2 and BCR1 bits will always read ‘1’. Refer to the IBI Payload and Mandatory Data Byte section for details.
  5. Depending on the application requirements by the user, this device can or cannot be speed limited. The user must set BCR0 bit accordingly. Refer to the Speed Limitations section for details.
  6. When BCR0 = 1, the Controller is required to query the Target for speed limitation details using the GETMXDS CCC.
  7. This register follows the definition of Bus Characteristics Register format as per the MIPI I3C Basic 1.0 Specification. Refer to the I3C Characteristics Registers section for details.
  8. To ensure expected behavior, this register should only be written when the module is disabled (EN = 0).
Name: I3CxBCR
Address: 0x0A8, 0x0DB

Bus Characteristics

Bit 76543210 
 BCR[7:6]BCR5BCR4BCR3BCR2BCR1BCR0 
Access RRRRRRRR/W 
Reset 00011110 

Bits 7:6 – BCR[7:6]  Device Role(1)

ValueDescription
11 Reserved by MIPI
10 Reserved by MIPI
01 I3C Controller
00 I3C Target (Always selected)

Bit 5 – BCR5  MIPI Reserved (Always read as 0)

Bit 4 – BCR4  Bridge Identifier(2)

ValueDescription
1 Device is a Bridge Device (Always selected)
0 Device is not a Bridge Device

Bit 3 – BCR3  Offline Capable(3)

ValueDescription
1 Device will not always respond to I3C Bus commands (Always selected)
0 Device will always respond to I3C Bus commands

Bit 2 – BCR2  IBI Payload(4)

ValueDescription
1 One (the Mandatory Data Byte) or more bytes follow an accepted IBI (Always selected)
0 No data byte follows the accepted IBI

Bit 1 – BCR1  IBI Request Capable(4)

ValueDescription
1 Device is capable of IBI Request (Always selected)
0 Device is not capable of IBI Request

Bit 0 – BCR0  Maximum Data Speed Limitation(5, 6)

ValueDescription
1 Data speed is limited
0 Data speed is not limited
This is a hard-coded read-only bit. This module only supports Target mode, so the BCR[7:6] bits will always read 0b00. This is a hard-coded read-only bit. This device has other communication peripherals outside of I3C making it a bridge-capable device, so the BCR4 bit will always read ‘1’. This is a hard-coded read-only bit. This Target module can be turned off or disabled, so the BCR3 bit will always read ‘1’. This is a hard-coded read-only bit. This Target module supports In-Band Interrupt requests with Mandatory Data Byte and additional payload, so both the BCR2 and BCR1 bits will always read ‘1’. Refer to the IBI Payload and Mandatory Data Byte section for details. Depending on the application requirements by the user, this device can or cannot be speed limited. The user must set BCR0 bit accordingly. Refer to the Speed Limitations section for details. When BCR0 = 1, the Controller is required to query the Target for speed limitation details using the GETMXDS CCC. This register follows the definition of Bus Characteristics Register format as per the MIPI I3C Basic 1.0 Specification. Refer to the I3C Characteristics Registers section for details. To ensure expected behavior, this register should only be written when the module is disabled (EN Target Enable = 0).