3.2.5 FIFO Logic
(Ask a Question)The FIFO interface logic loops back the CORE10GMAC RX data to TX data. FiFo_wrapper_Top is a user-defined RTL module, which uses the CoreFIFO IP to loop the MAC RX packet interface to the MAC TX packet interface.
The FIFO interface logic loops back the CORE10GMAC RX data to TX data. FiFo_wrapper_Top is a user-defined RTL module, which uses the CoreFIFO IP to loop the MAC RX packet interface to the MAC TX packet interface.
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