11.2.6 Generics and Parameters

Generics and parameters are used to define the size of a component. This allows the design of parameterized components for the size and feature sets that may be defined by values of the instantiation parameters. The following examples show how to use generics and parameters when describing a parameterized adder. Furthermore, this adder is instantiated for varying widths.

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity adder is
generic (WIDTH : integer := 8);
port (A, B: in UNSIGNED(WIDTH-1 downto 0);
CIN: in std_logic;
COUT: out std_logic;
Y: out UNSIGNED(WIDTH-1 downto 0));
end adder;
architecture rtl of adder is
begin
process (A,B,CIN)
variable TEMP_A,TEMP_B,TEMP_Y:UNSIGNED(A'length downto 0);
begin
TEMP_A := '0' & A;
TEMP_B := '0' & B;
TEMP_Y := TEMP_A + TEMP_B + CIN;
Y <= TEMP_Y (A'length-1 downto 0);
COUT <= TEMP_Y (A'length);
end process;
end rtl;

“Width” indicates the width of the adder. The instantiation for this parameterized adder for a bit width of 16 is:

U1: adder generic map(16) port map (A_A, B_A, CIN_A, COUT_A,Y_A);

module adder (cout, sum, a, b, cin);
parameter Size = 8;
output cout;
output [Size-1:0] sum;
input cin;
input [Size-1:0] a, b;
assign {cout, sum} = a + b + cin;
endmodule

“Size” indicates the width of the adder. The instantiation for this parameterized adder for a bit width of 16 is:

adder #(16) adder16(cout_A, sun_A, a_A, b_A, cin_A)