3.6.1.2.3 DFD – Data FIFO Data Register

Name:	DFD
Offset:	0x0D8
Reset:	0x00


Bit	7	6	5	4	3	2	1	0
	DFD[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 7:0 – DFD[7:0] Data FIFO Data

The DFD is not a physical register. It merely defines the I/O address for the AVR to write or read the FIFO data. A write access to this address transfers a data byte to the FIFO. A read access to this address fetches a data byte from the FIFO.

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