3.9.2 Host State Machine

The host state machine is the main controlling block of the SSM, which starts the different sub-state machines in the order configured in the MSMCRx registers. It waits for the completion of a sub-state machine before starting the next one.

The configuration of the host state machine is done via the MSMCRx registers, where a sequence of up to eight sub-state machines can be programmed. Then, the sequence is started by writing a ‘1’ to the run bit (SSMR) in the run register (SSMRR). The host state machine iterates through the programmed sub-state machines starting with the entry in MSMSM0. When the first sub-state machine is completed, the host state machine continues with the next one in MSMSM1 and so on. If it has reached either the end of the eighth sub-state machine or starts an entry with an empty MSMSMx, the host state machine is done and stops. The SSMIF flag in SSMIFR is set to ‘1’. If the interrupt mask in SSMIMR is set and if global interrupts are enabled, an interrupt is requested by the sequencer state machine. The firmware must check SSMERR in SSMSR if the state machine completed successfully to identify any errors that potentially occurred during operation.

If, for any reason, the sequencer state machine needs to be stopped before it has completed its operation, this can be done by writing a ‘1’ to the SSMST stop bit in the SSMRR run register. The host state machine as well as the currently running sub-state machine are stopped immediately and no interrupt is issued. As the state of the transceiver is unpredictable after a user stop, recommends restarting it with only the shut down state machine programmed to MSMSM0, which brings the system back into a known state.

All configuration settings such as filter bandwidth, enabled paths or other options need to be written before the host state machine is started. In addition, none of these settings must not be changed while the state machine is running.

... ;wait for interrupt or poll SSMRR.SSMR bit for finishing

;startup process, then get telegram can be enabled

The following code example shows the state machine setup for a start Rx sequence as shown in Figure 3-38.

C Code Example

/* setup all registers for e.g. frequency definition as FEMS and FFREQ1 and FFREQ2 etc. */

...

/* enable path A for reception */ SSMRCR = (1<<SSMPA);

/* configure host state machine (rx init with vco tuning) */ MSMCR1 = (SSM_VCOT<<4) | SSM_PLL_EN;

MSMCR2 = (SSM_RX_DSP_EN<<4) | SSM_PLL_LOCK;

/* end of sequence */ MSMCR3 = 0;

/* enable ssm interrupt */ SSMIMR = (1<<SSMIM);

enable_interrupt();

;start host state machine SSMRR = (1<<SSMR);

... /* wait for interrupt or poll SSMRR.SSMR bit for finishing startup process, then get telegram can be enabled */