5.3 STANDBY MODE

In Standby mode, the gate drive unit is in GDU OFF mode. The integrated LIN transceiver is in LIN Standby mode and is unable to transmit or receive data. All available VDDx regulators are active. The INH pin, if available, is driven high. The watchdog is set to active by default.

A transition into Normal mode only can be achieved by setting the DOPM bits to ‘111’.

The ATA6847 provides various interrupt registers. Register bits (see SIR1 Register to SIR4 Register) are set to ‘1’ by the device if a corresponding event has been detected. The detection of a wake-up or interrupt event is signaled via the NIRQ pin. The NIRQ pin voltage in high level (logic status ‘1’) is the same as VIO voltage and will be forced to low (logic status ‘0’) if an event has been captured and the corresponding interrupt mask bit is not set. The SPI interrupt registers can be read out to determine the corresponding trigger source.

The device will enter Standby mode in the following cases (see Device Operating Modes):

  • From MCU Reset mode, after reset pulse length time expired.
  • When DOPM is set to Sleep mode and a wake-up event occurs or all wake-up sources are disabled.
  • From Normal mode, when DOPM is set to Standby mode via SPI.
  • From Normal mode, when an invalid DOPM code was selected.

Watchdog During Standby Mode

By default, the watchdog is activated when switching into Standby mode. The watchdog will start in Time-Out mode by default. As a safety feature, the watchdog can only be configured in Standby mode. The intention is to avoid unwanted watchdog reconfiguration.

After start-up, the microcontroller is expected to initialize the ATA6847 registers. First, the microcontroller must write a valid watchdog trigger sequence (WDTRIG = 0x55).