1.3 Demo Design

This section describes the fabric, DDR interface, and XCVR design blocks implemented in Libero SoC.

The following figure shows the top-level blocks of SmartDebug.

Figure 1-1. SmartDebug Top-Level Blocks
Important: The FHB feature is not enabled in the demo design. To enable FHB debugging, provide the “FHB_ENABLE” argument with the given TCL script. This creates the design without the DDR controller block, because FHB debugging is currently not supported for designs that include a DDR controller. For more information about enabling FHB debugging using the TCL script, see Appendix 4: Running the TCL Script.

The top level block contains the following blocks: