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Debugging PolarFire FPGA Using SmartDebug Application Note AN4594
Debugging PolarFire FPGA Using SmartDebug Application Note AN4594
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  2. 1 Debugging PolarFire FPGA Designs Using SmartDebug
  3. 1.8 Debugging Using SmartDebug
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AN4594

  • Introduction
  • 1 Debugging PolarFire FPGA Designs Using SmartDebug
    • 1.1 Design Requirements
    • 1.2 Prerequisites
    • 1.3 Demo Design
    • 1.4 Clocking Structure
    • 1.5 Reset Structure
    • 1.6 Enabling FPGA Hardware Breakpoint (FHB)
    • 1.7 Programming the Device
    • 1.8 Debugging Using SmartDebug
      • 1.8.1 Launch SmartDebug from Libero
      • 1.8.2 View Device Status
      • 1.8.3 Debug FPGA Array
      • 1.8.4 Using FHB
      • 1.8.5 Debug µPROM
      • 1.8.6 sNVM Debug
      • 1.8.7 Debug TRANSCEIVER
      • 1.8.8 Debug DDR IO Margin
    • 1.9 Conclusion
  • 2 Appendix 1: Known Issues
  • 3 Appendix 2 : Synthesis
  • 4 Appendix 3: Place and Route
  • 5 Appendix 4: Running the TCL Script
  • 6 Appendix 5: References
  • 7 Revision History
  • Microchip FPGA Support
  • Microchip Information

1.8 Debugging Using SmartDebug

(Ask a Question)

To debug the device using SmartDebug, follow these steps:

  • Launch SmartDebug from Libero
  • View Device Status
  • Debug FPGA Array
  • Using FHB
  • Debug µPROM
  • sNVM Debug
  • Debug TRANSCEIVER
  • Debug DDR IO Margin

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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