4.1 Four-Wire Interface

One possible interface is the Four-Wire JTAG (IEEE 1149.1) port. Table 4-1 lists the required pin connections. This interface uses the following four communication lines to transfer data to and from the PIC32 device being programmed:

Test Clock Input (TCK)
Test Mode Select Input (TMS)
Test Data Input (TDI)
Test Data Output (TDO)

Table 4-1. Four-Wire Interface Pins
Device Pin Name	Pin Type	Pin Description
MCLR	Input	Programming enable
ENVREG⁽²⁾	Input	Enable for on-chip voltage regulator
V_DD, V_DDIO, V_DDCORE⁽²⁾, V_DDR1V8⁽²⁾, V_BAT⁽²⁾ and AV_DD⁽¹⁾	Power	Power supply
V_SS, V_SS1V8⁽²⁾ and AV_SS⁽¹⁾	Power	Ground
V_CAP⁽²⁾	Power	CPU logic filter capacitor connection
TDI	Input	Test Data In
TDO	Output	Test Data Out
TCK	Input	Test Clock
TMS	Input	Test Mode State
Note: All power supply and ground pins must be connected, including analog supplies (AV_DD) and ground (AV_SS). This pin is not available on all devices. Refer to the “Pin Diagrams” or “Pin Tables” section in the specific device data sheet to determine availability.

Test Clock Input (TCK)

TCK is the clock that controls the updating of the TAP controller and the shifting of data through the Instruction or selected Data registers. TCK is independent of the processor clock with respect to both frequency and phase.

Test Mode Select Input (TMS)

TMS is the control signal for the TAP controller. This signal is sampled on the rising edge of the TCK.

Test Data Input (TDI)

TDI is the test data input to the Instruction or selected Data register. This signal is sampled on the rising edge of the TCK for some TAP controller states.

Test Data Output (TDO)

TDO is the test data output from the Instruction or Data registers. This signal changes on the falling edge of TCK. TDO is only driven when data is shifted out, otherwise the TDO is tri-stated.