29.6 Power-Saving Control Registers
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x0FA0 | PMDCON | 15:8 | PMDLOCK | |||||||
| 7:0 | ||||||||||
0x0FA2 ... 0x0FA3 | Reserved | |||||||||
| 0x0FA4 | PMD1 | 15:8 | T1MD | QEIMD | PWMMD | |||||
| 7:0 | I2C1MD | U2MD | U1MD | SPI2MD | SPI1MD | C2MD | C1MD | ADC1MD | ||
| 0x0FA6 | PMD2 | 15:8 | CCP9MD | |||||||
| 7:0 | CCP8MD | CCP7MD | CCP6MD | CCP5MD | CCP4MD | CCP3MD | CCP2MD | CCP1MD | ||
| 0x0FA8 | PMD3 | 15:8 | PMPMD | |||||||
| 7:0 | CRCMD | QEI2MD | U3MD | I2C3MD | I2C2MD | |||||
| 0x0FAA | PMD4 | 15:8 | ||||||||
| 7:0 | REFOMD | |||||||||
0x0FAC ... 0x0FAD | Reserved | |||||||||
| 0x0FAE | PMD6 | 15:8 | DMA7MD | DMA6MD | DMA5MD | DMA4MD | DMA3MD | DMA2MD | DMA1MD | DMA0MD |
| 7:0 | QEI3MD | SPI3MD | ||||||||
| 0x0FB0 | PMD7 | 15:8 | CMP6MD | CMP5MD | CMP4MD | CMP3MD | CMP2MD | CMP1MD | ||
| 7:0 | PTGMD | |||||||||
| 0x0FB2 | PMD8 | 15:8 | OPAMPMD | SENT2MD | SENT1MD | DMTMD | ||||
| 7:0 | CLC4MD | CLC3MD | CLC2MD | CLC1MD | BIASMD |