2.1.3.4.1 Probability-Based ECC Flag Assertion

With this feature, ECC flags are asserted depending on the probability parameter provided by you through vsim commands. The read data is unaffected by the flag behavior and is always corrected in the simulation regardless of the flag state.

The added logic also ensures that the flag outputs from the PF_TPSRAM block are always assigned a value and do not become unknown during periods when the read enable is not asserted high. For more information, see Libero SoC v11.9 SP2, v11.9 SP3, or Libero SoC v12.1 release notes.

Enable the simulation to report errors, the following options must be added to the vsim command. These are set on the command-line when entering the vsim command or through the Libero Project settings as shown in the following figure.

Figure 2-20. Libero Project Settings
-gERROR_PROBABILITY
  • Legal values are -0<= value <=1.
  • The simulation uses a random number generator and compares its value with the value assigned to ERROR_PROBABILITY.
  • SB_CORRECT asserted = "1" indicates a single bit error has occurred.
  • The assertion rate of SB_CORRECT is directly related to the value of ERROR_PROBABILITY. Increasing the value, results in SB_CORRECT being asserted more often and decreasing the value, results in SB_CORRECT being asserted less often.
-gCORRECTION_PROBABILITY
  • Legal values are -0<= value <=1.
  • The simulation uses a random number generator and compares its value with the value assigned to DB_DETECT asserted = "1" indicates more than one bit error has occurred and could not be corrected.
  • ERROR_CORRECTION
  • The assertion rate of DB_DETECT is inversely related to the value of CORRECTION_PROBABILITY. Increasing the value results in DB_DETECT being asserted less often and decreasing the value results in DB_DETECT being asserted more often.