2.1.3.4.3 Simulation Flow Example

Enter all ECC related Verilog tasks as per the Logical Address in the user_ecc_wrapper.v file in the following format.

sd_0.PF_TPSRAM_C0.ecc_err_inject_inst.enable_ecc_err_inject(1'b1);
sd_0.PF_TPSRAM_C0.inject_single_addr_ecc_errors(m'hLA1,n'hDM_LA1);
...

Table 2-15. ECC Include File Format
Format	Description
`sd_0`	Design instance name in the testbench
`PF_TPSRAM_C0`	Logical instance name of PolarFire Two-Port Large SRAM in the design
`m`	Size of the logical address
`LA1`	Logical address
`n`	Size of the data mask
`DM_LA1`	Data mask bits for the logical address

Important: Ensure that you provide the accurate hierarchy up to the LSRAM instance before populating the ecc_err_inject_inst.enable_ecc_err_inject and inject_single_addr_ecc_errors tasks in the user_ecc_wrapper.v file.

The following is an example with the logical configuration of depth set to 4096, width set to 20 of PF_TPSRAM in the design sd_0 with logical instance PF_TPSRAM_C0.

initial
begin
	tb.sd_0.PF_TPSRAM_C0.enable_ecc_err_inject(1'b1);
	tb.sd_0.PF_TPSRAM_C0.inject_single_addr_ecc_errors(12'h100 ,20'h00002);
	tb.sd_0.PF_TPSRAM_C0.inject_single_addr_ecc_errors(12'h1a0 ,20'h00003);
	tb.sd_0.PF_TPSRAM_C0.inject_single_addr_ecc_errors(12'h1ff ,20'h00004);
end

Download the PolarFire_ecc_include_file_gen.py Python script file to your computer.

Extract the contents of the .zip file to any location on the computer.

Use any standard Python executor and change the directory to the location where the script is extracted and execute the PolarFire_ecc_include_file_gen.py python script with the following arguments.

python PolarFire_ecc_include_file_gen.py <libero_project_location> <user_ecc_wrapper.v>

Example 1: In the following example, the user_ecc_wrapper.v file and the script file are placed in the same location as that of the Libero project.

python PolarFire_ecc_include_file_gen.py . .

Example 2: In the following example, the user_ecc_wrapper.v file is located inside the stimulus folder under the Libero project folder, which is located in the path D:/user/test_ecc.

python PolarFire_ecc_include_file_gen.py D:/user/test_ecc D:/user/test_ecc/stimulus

After successful execution of the script, the generated_ecc_wrapper.v file is generated with the physical block instance name embedded in the hierarchical path and both Address and Data Mask breakdown, as shown in the following example:

initial
begin
	//tb.sd_0.PF_TPSRAM_C0.enable_ecc_err_inject(1'b1);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0.u0.enable_ecc_err_inject(1'b1);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R1C0.u0.enable_ecc_err_inject(1'b1);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R2C0.u0.enable_ecc_err_inject(1'b1);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R3C0.u0.enable_ecc_err_inject(1'b1);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R4C0.u0.enable_ecc_err_inject(1'b1);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R5C0.u0.enable_ecc_err_inject(1'b1);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R6C0.u0.enable_ecc_err_inject(1'b1);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R7C0.u0.enable_ecc_err_inject(1'b1);
	//tb.sd_0.PF_TPSRAM_C0.inject_single_addr_ecc_errors(12'h100 ,20'h00002);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0.u0.inject_single_addr_ecc_errors(9'h100,33'h2);
	//tb.sd_0.PF_TPSRAM_C0.inject_single_addr_ecc_errors(12'h1a0 ,20'h00003);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0.u0.inject_single_addr_ecc_errors(9'h1a0,33'h3);
	//tb.sd_0.PF_TPSRAM_C0.inject_single_addr_ecc_errors(12'h1ff ,20'h00004);
	tb.sd_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0.u0.inject_single_addr_ecc_errors(9'h1ff,33'h4);
end

Run the Simulation using any one of the following methods, after the generated_ecc_wrapper.v file is generated.

Without modifying the testbench:
Compile the generated_user_ecc_wrapper.v file using the run.do file as shown in the following figure.
Figure 2-21. run.do File
Modifying the testbench:
Directly place the generated_ecc_wrapper.v file at the same location as that of the testbench and include the file after instantiating the design under test as follows or provide the absolute path of the generated_ecc_wrapper.v file:
```
`include “generated_ecc_wrapper.v”
```

Run your simulation and then expect the assertion of ECC error flags as per address and data mask bits provided in the user_ecc_wrapper.v file.