25.10.13 Channel Control CRC Register

CHCTRLAk.ENABLE=1 write protected.

Table 25-27. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Grey cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
K	Write to clear	S	Software settable bit	—	—

Bit 7 – CRCRIN CRC Reflect Input Selection

This option is sometimes referred to as Reflected Byte or Reflected Input (RefIn).

This register is ignored if CHCTRLBk.CRCEN=0, otherwise CRCRIN provides the following functions.

Value	Description
0	Bytes are not reflected and are processed as read from the Source location.
1	Each byte is reflected bit-wise before being processed by the CRC engine.

This register is ignored if CHCTRLBk.CRCEN=0, otherwise CRCROUT provides the following functions.

Value	Description
0	CRC results are read back in the native bit order. If CRCAPP=1, the value appended to the end of the block is in the native bit order.
1	The CRC result are read back in reverse bit order. If CRCAPP=1, the value appended to the end of the block is in reverse bit order.

This register is ignored if CHCTRLBk.CRCEN=0, otherwise CRCXOR provides the following functions.

Value	Description
0	CRC results are read back without XOR’ing. If CRCAPP=1, the appended value not XOR’ed.
1	CRC results are read back after being XOR’ed with 1’s. This is the equivalent of XOR’ing the 16-bit CRC value with 0xFFFF or the 32-bit CRC value with 0xFFFF_FFFF. If CRCAPP=1, the value appended to the end of the block is result of the XOR.

This register is ignored if CHCTRLBk.CRCEN=0, otherwise CRCAPP provides the following functions.

Value	Description
0	The DMA transfers data from the source, re-orders it according to CHCTRLBk.BYTORD[1:0], drives it through the CRC and AFTER that writes the data to destination obeying WBOEN (Write Byte Order Enable) either re-ordered or unchanged. The resulting CRC is not appended but is available in the CHCRCDAT register.
1	The DMA transfers data from the source, re-orders it according to CHCTRLBk.BYTORD[1:0], drives it through the CRC and AFTER that writes the data to destination obeying WBOEN (Write Byte Order Enable) either re-ordered or unchanged. The DMA then writes the final calculated CRC at the end of the block.

This register is ignored if CHCTRLBk.CRCEN=0, otherwise CRCMD provides the following functions.

Value	Description
111	Calculate an IP Header Checksum
110	Calculate CRC based on the 32-bit polynomial provided in register CRCPOLYB 101 =Calculate CRC based on the 32-bit polynomial provided in register CRCPOLYA 100 =CRC-32 (0x04C11DB7)
011	Calculate CRC based on the 16-bit polynomial provided in register CRCPOLYB[15:0] 010 =Calculate CRC based on the 16-bit polynomial provided in register CRCPOLYA[15:0] 001 =CRC-16 CCITT (0x1021)
000	CRC-16, also known as CRC-16-IBM and CRC-16-ANSI (0x8005)