21.6.10 INIT_LOCK

Description

"INIT_LOCK" is a TCL equivalent command name for the Configure Register Lock Bits tool. This command imports a Lock Bit Configuration File (*.txt) and configures the Register Lock Bits of FDDR, MSS, and SERDES blocks for SmartFusion 2 and IGLOO 2 devices so that they cannot be overwritten by Fabric or MSS Masters that have write access to these registers. This command takes only one parameter, INIT_LOCK_FILE.


configure_tool \
     -name {INIT_LOCK} \
     -params {INIT_LOCK_FILE: <path to the config lock bit file>}

Arguments

ParameterTypeDescription
INIT_LOCK_FILEstringSpecifies full or relative path to the config lock bit file that contains the Register Lock Bit settings.
Return TypeDescription
IntegerReturns 0 on success and 1 on failure.

Register Lock Bit Text File Template

An initial Configuration Lock Bit file can be generated from the Design Flow window (Design Flow window > Generate FPGA Array Data) or via "run_tool -name {GENERATEPROGRAMMINGDATA}" TCL command. The file is named <proj_location>/designer/<root>/<root>_init_config_lock_bits.txt. This is the initial and the default Lock Bit Configuration File. Use this file as a template to make changes. Modify it to ensure that the lock bits are set to "0" for all register bits you want to lock. Save the file as a *.txt file with a different name and import the file into the project using the Register Lock Bit Settings dialog box (Design Flow window > Configure Register Lock Bits).

Register Lock Bit Text File Syntax

A valid entry in the Lock Bit Configuration file is defined as <lock_parameters> <lock bit value> pair.
  • If the lock bit is for a register the parameter name is defined as:
    • <Physical block name>_<register name>_LOCK
  • If the lock bit is for a field the parameter name is defined as:
    • <Physical block name>_<register name>_<field name>_LOCK
  • The physical block name (which may vary with device family and die) is defined as:
    • MSS
    • FDDR
    • SERDES_IF_x (where x is 0,1,2,3 to indicate the physical SERDES location) for SmartFusion 2, and IGLOO 2 (010/025/050/150) devices
    • SERDES_IF2 (060/090) devices (only one SERDES block per device for SmartFusion 2 and IGLOO 2 devices)
Set the lock bit value to ‘1’ to indicate that the register can be written, “0” to indicate that the register cannot be written (locked). Lines starting with “#” or “;” are comments and empty lines are allowed in the Lock Bit Configuration file(example below). 
# Register Lock Bits Configuration File for MSS, SERDES(s) and Fabric DDR
# Microchip Corporation - Microchip Libero Software Release v12.4 (Version 12.900.0.16)
# Date: Tue Jun 15 09:33:35 2021

# Lock Value = 0, disables modification of the Register field.


# HPMS/MDDR ( Unused )
 MSS_ESRAM_CONFIG_LOCK                               1  
 MSS_ESRAM_MAX_LAT_LOCK                              1  
 MSS_DDR_CONFIG_LOCK                                 1  
 MSS_ENVM_CONFIG_LOCK                                1  
 MSS_ENVM_REMAP_BASE_LOCK                            1  
 MSS_ENVM_FAB_REMAP_LOCK                             1  
 MSS_CC_CONFIG_LOCK                                  1  
 MSS_CC_CACHEREGION_LOCK                             1  
 MSS_CC_LOCKBASEADDR_LOCK                            1  
 MSS_CC_FLUSHINDX_LOCK                               1
During Map File generation (Design Flow window > Generate FPGA Array Data), Libero SoC validates the Register Lock Bit Configuration file and displays error message when invalid parameter or parameter values are found.

Error Codes

Error CodeDescription
NoneRequired parameter 'params' is missing.

Supported Families

SmartFusion® 2
IGLOO® 2

Example

Configure Register Lock Bits

# Full path
configure_tool -name {INIT_LOCK} \
               -params {INIT_LOCK_FILE:D:/designs/g4_fclk_mddr_clk/sb_init_config_lock_bits_src.txt}
# Relative path from project folder
configure_tool -name {INIT_LOCK} \
               -params {INIT_LOCK_FILE:../sb_init_config_lock_bits_src.txt}