50.27 I2C Bus Start/Stop Bits Requirements

Table 50-25. I2C Start Stop Requirements
Standard Operating Conditions (unless otherwise stated)
Param. No. Sym. Characteristic Min. Typ. † Max. Units Conditions
SP90* TSU:STA

Start condition

Setup time

100 kHz mode 4700 ns Only relevant for Repeated Start condition
SP90A* 400 kHz mode 600
SP90B* 1 MHz mode 260
SP91* THD:STA

Start condition

Hold time

100 kHz mode 4000 ns After this period, the first clock pulse is generated
SP91A* 400 kHz mode 600
SP91B* 1 MHz mode 260
SP92* TSU:STO

Stop condition

Setup time

100 kHz mode 4000 ns
SP92A* 400 kHz mode 600
SP92B* 1 MHz mode 260
SP93* THD:STO

Stop condition

Hold time

100 kHz mode 4700 ns
SP93A* 400 kHz mode 1300
SP93B* 1 MHz mode 500

* These parameters are characterized but not tested.

Figure 50-17. I2C Bus Start/Stop Bits Timing
Note: Refer to the Load Conditions figure for more details.