50.5 Power-Down Current (IPD)(1, 2,3)

Table 50-3. Power Down Current
Standard Operating Conditions (unless otherwise stated)
Param. No. Sym. Device Characteristics Min. Typ.† Max. +85°C Max. +125°C Units Conditions
VDD VREGPM Note
D200 IPD IPD Base — 1.2 3.8 4.6 μA 3.0V 'b11
D200A — 0.9 12.1 34 μA 3.0V 'b10
D200B — 29.5 56 70 μA 3.0V 'b01
D200C — 157 260 275 μA 3.0V 'b00
D201 IPD_WDT Low-Frequency Internal Oscillator/WDT — 1.5 4 5.1 μA 3.0V 'b11
D202* IPD_SOSC Secondary Oscillator (SOSC) — 2.1 4.8 7.9 μA 3.0V 'b11 SOSCPWR = 0
D203 IPD_LPBOR Low-Power Brown-out Reset (LPBOR) — 1.3 4 6 μA 3.0V 'b11
D204 IPD_FVR_BUF1 FVR Buffer 1 (ADC) — 180 281 285 μA 3.0V 'b11
D204A IPD_FVR_BUF2 FVR Buffer 2 (DAC/CMP) — 49.4 80 93 μA 3.0V 'bx1 or 'b10
D205 IPD_BOR Brown-out Reset (BOR) — 17 24 25 μA 3.0V 'b11
D206 IPD_HLVD High/Low Voltage Detect (HLVD) — 17 25 27 μA 3.0V 'b11
D207 IPD_ADCA ADC - Active — 483 813 819 μA 3.0V 'bx1 or 'b10 ADC is converting (4)
D208* IPD_CMP Comparator — 94 — — μA 3.0V 'b11 SP='b00
D208A* — 41 49 50 μA 3.0V 'b11 SP='b01
D208B — 36 — — μA 3.0V 'b11 SP='b10
D208C* — 100 — — μA 3.0V 'b11 SP='b11
D209 IPD_OPA Operational Amplifier — 1.10 1.7 1.8 mA 3.0V 'b01 Charge Pump On; VICM = VDD/2

* These parameters are characterized but not tested.

† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the IPD base and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPD current from this limit. Max. values may be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in High Impedance state and tied to VSS or all pins driven low.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is ADCRC.