3.8.2 IO0SETTING

Name: IO0SETTING
Offset: 0x02
Property: -

Bit 76543210 
 IDLST0ALRT0EG[1:0]OD0SELPU0SELIO0DIRIO0DES[1:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00001100 

Bit 7 – IDLST0

IO0 Pin Idle or default output state selection bit (valid only when the pin is configured as an output pin).
ValueDescription
0 Idle state default output value is logic ‘0’
1 Idle state or default output value is logic ‘1’

Bits 6:5 – ALRT0EG[1:0] Alert0 or Interrupt0 Pin Edge Selection

This is valid only when the pin is configured as the ALRT0 pin.
ValueDescription
00 Alert or interrupt disabled
01 Falling edge
10 Rising edge
11 Both edge

Bit 4 – OD0SEL IO0 Pin Open-Drain Selection

This is valid only when the pin is configured as an output and not as a CSx pin.
ValueDescription
0 The output pin is not an open-drain pin
1 The output pin is an open-drain pin

Bit 3 – PU0SEL IO0 Pin Pull-Up Enable

This is valid only when the pin is configured as an input.
ValueDescription
0 The internal pull-up is disabled
1 The internal pull-up is enabled (factory default)

Bit 2 – IO0DIR IO0 Direction

Input or output.
ValueDescription
0 GPIO output
1 GPIO input (factory default)

Bits 1:0 – IO0DES[1:0] IO0 Designation

Input or output.
ValueDescription
00 GPIO0 pin (GPIO0) (factory default)
01 Clear-to-Send (CTS): UART handshaking signal Pin (CTS)
10 SPI client chip select 3 pin (CS3)
11 Alert0 or Interrupt0 pin (ALRT0)