2.1.4.5 Calculation for Heat Sink

For example, in a design implemented in an A2F500-FG484 package with 2.5 m/s airflow, the power consumption value using the power calculator is 3W. The user-dependent Ta and Tj are given as follows:

TJ = 100.00 °C

TA = 70.00 °C

From the datasheet:

θJA = 16.4 °C/W

θJC = 7.5 °C/W

Figure 2-8. EQ 6

The 1.82 W power is less than the required 3.00 W. The design therefore requires a heat sink, or the airflow where the device is mounted should be increased. The design's total junction-to-air thermal resistance requirement can be estimated by 2.1.4.5 Calculation for Heat Sink:

Figure 2-9. EQ 7

Determining the heat sink's thermal performance proceeds as follows:

Figure 2-10. EQ 8

where:

θJA = 0.37°C/W

= Thermal resistance of the interface material between the case and the heat sink, usually provided by the thermal interface manufacturer

θSA = Thermal resistance of the heat sink in °C/W

Figure 2-11. EQ 9

A heat sink with a thermal resistance of 2.5 °C/W or better should be used. Thermal resistance of heat sinks is a function of airflow. The heat sink performance can be significantly improved with increased airflow.

Carefully estimating thermal resistance is important in the long-term reliability of an FPGA. Design engineers should always correlate the power consumption of the device with the maximum allowable power dissipation of the package selected for that device.

Note: The junction-to-air and junction-to-board thermal resistances are based on JEDEC standard (JESD-51) and assumptions made in building the model. It may not be realized in actual application and therefore should be used with a degree of caution. Junction-to-case thermal resistance assumes that all power is dissipated through the case.