13.5.4 Indirect Addressing Operation

In the descriptor-based operation, DMA begins its operation upon triggered by fetching its descriptor(s) to retrieve the Payload Pointer(s) to be used for the data transfer, and the Descriptor Pointer Offsets to be used to determine the next Descriptor Pointer. It then proceeds to perform its data transfer operation by reading the payload from the location given in the Source Payload Pointer (SPP) or from the descriptor if the Source Descriptor Table (SDT) is enabled, and subsequently writing it to the location given in the Destination Payload Pointer (DPP) or from the descriptor if the Destination Descriptor Table (DDT) is enabled.

To properly support this mode of operation, at least one Descriptor Table must be preloaded into the memory mapped locations with the appropriate Descriptor Pointer(s) also programmed into the SADDR[23:0] or DADDR[23:0] registers or both. All other control and configuration registers must also be programmed accordingly.

Figure   1 illustrates the flow of operation with an example when only the Source Descriptor Table (SDT) is enabled.

Note:

1. DPO1M1 = DPO1M0 = 1 for +4, SIZE1[1:0] = 10 for 32-bit transfer
2. DPO2M1 = DPO2M0 = 2 for +8, SIZE2[1:0] = 10 for 32-bit transfer

Figure   2 illustrates the flow of operation with an example when only the Destination Descriptor Table is enabled. This essentially follows the transaction of the indirect addressing operation with the extracted Payload Pointer being completely independent from one another, thus allowing for random access of any memory mapped locations.

Note:

1. DPO1M1 = DPO1M0 = 1 for +4, SIZE1[1:0] = 10 for 32-bit transfer
2. DPO2M1 = DPO2M0 = 2 for +8, SIZE2[1:0] = 10 for 32-bit transfer

With the descriptor-based operation utilizing indirect addressing, random locations can be accessed consecutively by one single DMA channel without requiring any CPU intervention. This helps to protect the precious system resources.