6.2.2 Nonvolatile Memory Lower Address Register(1)
Note:
- This register is not writable when WR =
1. - This register's bit values are only reset on a POR or BOR.
| Name: | NVMADR |
| Offset: | 0x3004 |
Legend: R = Readable bit; W = Writable bit
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| NVMADR[23:16] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| NVMADR[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| NVMADR[7:4] | NVMADR[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 23:4 – NVMADR[23:4] NVM Address Register bits(1)
NVM Address register is used to program a Flash word or Flash row or perform a page erase. During row programming, the address may point to any Flash word within the Flash row. The row programming always starts at the beginning of the Flash row.