12.10.2.7 Programming and Debug Interface Configuration
Note: These fuses are only effective after a Reset (Reset initialization has
run) and if the device is in the locked state.
| Name: | PDICFG |
| Offset: | 0x0A |
| Reset: | 0x0003 |
| Property: | - |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| KEY[11:4] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| KEY[3:0] | LEVEL[1:0] | ||||||||
| Access | R | R | R | R | R | R | |||
| Reset | 0 | 0 | 0 | 0 | 1 | 1 | |||
Bits 15:4 – KEY[11:0] NVM Protection Activation Key
| Value | Name | Description |
|---|---|---|
| 0xB45 | NVMACT | NVM protection active |
| Other | - | Not active |
Bits 1:0 – LEVEL[1:0] Protection Level
CAUTION: After NVMACCDIS is selected, it is
impossible to re-enable UPDI access for device programming. Before entering this mode, fully comprehended the
consequences: Chip Erase and User Row writes are blocked, and any programming needs to go through a bootloader in the
Boot Code section.
Note: After NVMACCDIS activation, access to NVM is very
restricted for external testing. Some testing will be possible, but advanced failure analysis will not be possible. The
CRC status is available.
| Value | Name | Description |
|---|---|---|
| Other | — | Reserved |
| 0x2 | NVMACCDIS | Program and Debug Interface Disable (PDID): NVM access through UPDI is permanently disabled. |
| 0x3 | BASIC | The UPDI peripheral and the UPDI pin are working as described in the UPDI section |