12.10.2.3 System Configuration 0

The default value given in this fuse description is the factory-programmed value and must not be mistaken for the Reset value.

Name: SYSCFG0
Offset: 0x05
Reset: 0x00
Property: -

Bit 76543210 
 CRCBOOTCRCSEL    BROWSAVEEESAVE 
Access RRRR 
Reset 0000 

Bit 7 – CRCBOOT CRC Boot

This bit controls whether the Boot section of the Flash will be checked by the CRCSCAN peripheral during the Reset initialization. Refer to the CRCSCAN - Cyclic Redundancy Check Memory Scan section for more information about the functionality.
ValueNameDescription
0 DISABLE No CRC
1 ENABLE CRC of the Boot section

Bit 6 – CRCSEL CRC Mode Selection

This bit controls the type of CRC performed by the CRCSCAN peripheral. Refer to the CRCSCAN - Cyclic Redundancy Check Memory Scan section for more information about the functionality.
ValueNameDescription
0 CRC16 CRC-16-CCITT
1 CRC32 CRC-32 (IEEE 802.3)

Bit 1 – BROWSAVE Boot Row Save During Chip Erase

This bit controls whether the Boot Row is erased or preserved during a chip erase.
ValueNameDescription
0 DISABLE Boot Row is erased during chip erase
1 ENABLE Boot Row is preserved during a chip erase

Bit 0 – EESAVE EEPROM Save During Chip Erase

This bit controls whether the EEPROM is erased or preserved during a chip erase.
ValueNameDescription
0 DISABLE EEPROM is erased during chip erase
1 ENABLE EEPROM is preserved during a chip erase