1.7 Watchdogs

Two watchdogs are present on the device, one asynchronous watchdog (WDT) and one synchronous watchdog (SWDT). The asynchronous watchdog is clocked by an independent clock source and will directly reset the device when an error is detected. The synchronous watchdog is clocked by the main clock and counts either clock cycles or CPU instructions. Any SWDT error will signal the Error Controller, which will take appropriate action according to the ERRCTRL configuration.