19.6.3 Voltage Regulator Control Register
| Name: | VREGCTRL |
| Offset: | 0x02 |
| Reset: | 0x40 |
| Property: | Configuration Change Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| VMONSEN | PMODE[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 1 | 0 | 0 | 0 | |||||
Bit 6 – VMONSEN VMON Sleep Mode Enable
0’ disables the VMON in Standby or Power-Down sleep modes, which
reduces power consumption at the cost of reduced
protection.| Value | Name | Description |
|---|---|---|
| 0 | DISABLE | VMON disabled in Standby and Power-Down sleep mode |
| 1 | ENABLE | VMON enabled in Standby and Power-Down sleep mode (Reset value) |
Bits 2:0 – PMODE[2:0] Power Mode Select
This bit field controls the drive strength of the voltage regulator.
| Value | Name | Description |
|---|---|---|
| 0x0 | AUTO | In Active and Idle sleep modes with any clock source other than the 32.768 kHz oscillator, or if UPDI is active, the voltage regulator is in maximum performance mode. In Active and Idle sleep modes with the 32.768 kHz oscillator and UPDI inactive, the voltage regulator is in power-saving mode. In Standby and Power-Down sleep modes, the voltage regulator is in power-saving mode, unless UPDI is active or a peripheral is requesting a clock source faster than 32.768 kHz. |
| 0x1 | FULL | The voltage regulator is in maximum performance mode for Active and all sleep modes. A shorter time is needed to wake the device from sleep mode. |
| Other | — | Reserved |