6.3.15 PWB ECC RAM Value Register (a = x or y)
Legend: R = Readable bit; HC = Hardware Clearable bit; HS = Hardware Settable bit
| Name: | PWBXECCVAL, PWBYECCVAL |
| Offset: | 0x35B8, 0x35F8 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ECCVAL[6:0] | |||||||||
| Access | R/HS/HC | R/HS/HC | R/HS/HC | R/HS/HC | R/HS/HC | R/HS/HC | R/HS/HC | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||