1.3.1.1 Receive interface

The PF_IOD_CDR IP includes the clock recovery block, which generates the recovered clock for sampling the incoming data stream. This IP uses the four clocks of phases 0, 90,180, and 270 degrees for the clock recovery. The recovered clock (RX_CLK_R) is used by the fabric for sampling the Rx data from PF_IOD_CDR IP. The CoreTSE logic also uses this clock.

For more information about PF_IOD_CDR and its blocks, see PolarFire FPGA and PolarFire SoC FPGA User I/O User Guide.