2.6.2 AXI Transactions

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The following timing diagrams illustrate the operation of the DDR controller with the AXI interface. The Micron DDR3 16-bit memory model is used to perform the read and write transactions.

Figure 2-17. AXI Single Write Transaction

Figure 2-18. AXI Burst Write Transaction (INCR-2)

Figure 2-19. AXI Single Read Transaction

Figure 2-20. AXI Burst Read Transaction (INCR-2)

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