45.7.20 I2SMCC Write Protection Status Register

Name: I2SMCC_WPSR
Offset: 0xE8
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
 WPVSRC[23:16] 
Access RRRRRRRR 
Reset 00000000 
Bit 2322212019181716 
 WPVSRC[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 15141312111098 
 WPVSRC[7:0] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
        WPVS 
Access R 
Reset 0 

Bits 31:8 – WPVSRC[23:0] Write Protection Violation Source

When WPVS = 1, WPVSRC indicates the register address offset at which a write access has been attempted.

Bit 0 – WPVS Write Protection Violation Status

ValueDescription
0

No write protection violation has occurred since the last read of the I2SMCC_WPSR.

1

A write protection violation has occurred since the last read of the I2SMCC_WPSR. If this violation is an unauthorized attempt to write a protected register, the associated violation is reported into field WPVSRC.