30.6.14 OTPC User Hardware Configuration 0 Register
Note: The reset value depends on the
hardware configuration.
| Name: | OTPC_UHC0R |
| Offset: | 0x50 |
| Reset: | 0x00000000 |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SECDBG[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| JTAGDIS[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:8 – SECDBG[7:0] Secure Debug
| Value | Description |
|---|---|
| 0 | The secure debug is allowed. |
| Non-Zero | The secure debug is forbidden. |
Bits 7:0 – JTAGDIS[7:0] JTAG Disable
| Value | Description |
|---|---|
| 0 | The JTAG is enabled. |
| Non-zero | The JTAG is disabled. |