12.4.3.1 Oscillator Start-up Time
As the device voltage increases from VSS, the oscillator will start its oscillations. The time required for the oscillator to start oscillating depends on these factors:
- Crystal and resonator frequency
- Capacitor values used (C1 and C2 in Figure 12-9)
- Device VDD rise time
- System temperature
- Series resistor value and type if used
- Oscillator mode selection of device (selects the gain of the internal oscillator inverter)
- Crystal quality
- Oscillator circuit layout
- System noise
Figure 12-10 illustrates a plot of a typical oscillator and resonator start-up.
To ensure that a crystal oscillator (or ceramic resonator) has started and stabilized, an Oscillator Start-up Timer (OST) is provided with the POSC. The OST is a simple, 10-bit counter that counts 1024 cycles before releasing the oscillator clock to the rest of the system. This time-out period is denoted as TOST.
The amplitude of the oscillator signal must reach the VIL and VIH thresholds for the oscillator pins before the OST can begin to count cycles. The TOST interval is required every time the oscillator restarts (that is, on POR, BOR and wake-up from Sleep mode) when XT or HS mode is selected in the Configuration Words. The TOST timer does not exist when EC mode is selected.
After the POSC is enabled, it takes a finite amount of time to start oscillating. This delay is denoted as TOSCD. After TOSCD, the OST timer takes 1024 clock cycles (TOST) to release the clock. The total delay for the clock to be ready is: TOSCD + TOST. If the PLL is used, an additional delay is required for the PLL to lock. For more information, see Phase-Locked Loop (PLL).
POSC start-up behavior is illustrated in Figure 12-11, where the CPU begins toggling an I/O pin when it starts execution after the TOSCD + TOST interval.