19.4.1.1 SPI Host Mode Clock Frequency
The SPI module allows flexibility in baud rate generation through the 13-bit SPIxBRG
register. SPIxBRG is readable and writable and determines the baud rate. The clock
provided to the SPI module, FSPICLK, can be found in Table 19-2. This clock is divided based on the value loaded into SPIxBRG. The
SCKx clock, obtained by dividing FSPICLK, is 50% duty cycle and it is
provided to the external devices through the SCKx pin. Refer to Figure 19-29.
Note: The SCKx clock
is not free running for Non-Framed SPI modes. It will only run for 8, 16 or 32
pulses when SPIxBUF is loaded with data. It will, however, be continuous for Framed
modes.
Equation 19-1 defines the SCKx clock frequency as a function of SPIxBRG settings.
Therefore, the maximum baud rate possible is FSPICLK/2 (SPIxBRG =
0
) and the minimum baud rate possible is
FSPICLK/16384.
Some sample SPI clock frequencies are shown in Table 19-13.
SPIxBRG Setting | 0 | 15 | 31 | 63 | 85 | 127 | 255 | 511 |
---|---|---|---|---|---|---|---|---|
FSPICLK = 32 MHz | 16.00 MHz | 10.0 MHz | 500 kHz | 257 kHz | 190.48 kHz | 125 kHz | 62.5 kHz | 31.25 kHz |
FSPICLK = 25 MHz | 12.50 MHz | 781.25 kHz | 390.63 kHz | 145.35 kHz | 97.66 kHz | 281.25 kHz | 48.83 kHz | 24.41 kHz |
FSPICLK = 20 MHz | 10.00 MHz | 625 kHz | 312.50 kHz | 156.25 kHz | 116.28 kHz | 78.13 kHz | 39.06 kHz | 19.53 kHz |
FSPICLK = 12 MHz | 6.00 MHz | 375 MHz | 187.50 kHz | 93.75 kHz | 69.77 kHz | 46.88 kHz | 23.44 kHz | 11.72 kHz |
FSPICLK = 10 MHz | 5.00 MHz | 312.50 kHz | 156.25 kHz | 78.13 kHz | 58.14 kHz | 39.06 kHz | 19.53 kHz | 9.77kHz |
FSPICLK = 8 MHz | 4.00 MHz | 250 kHz | 125 kHz | 62.50 kHz | 46.51 kHz | 31.25 kHz | 15.63 kHz | 7.81 kHz |
Note:
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