19.4.1.1 SPI Host Mode Clock Frequency

The SPI module allows flexibility in baud rate generation through the 13-bit SPIxBRG register. SPIxBRG is readable and writable and determines the baud rate. The clock provided to the SPI module, FSPICLK, can be found in Table 19-2. This clock is divided based on the value loaded into SPIxBRG. The SCKx clock, obtained by dividing FSPICLK, is 50% duty cycle and it is provided to the external devices through the SCKx pin. Refer to Figure 19-29.
Note: The SCKx clock is not free running for Non-Framed SPI modes. It will only run for 8, 16 or 32 pulses when SPIxBUF is loaded with data. It will, however, be continuous for Framed modes.

Equation 19-1 defines the SCKx clock frequency as a function of SPIxBRG settings.

Equation 19-1. SCKx Frequency

Therefore, the maximum baud rate possible is FSPICLK/2 (SPIxBRG = 0) and the minimum baud rate possible is FSPICLK/16384.

Some sample SPI clock frequencies are shown in Table 19-13.

Table 19-13. Sample SCKx Frequencies(1)

SPIxBRG Setting

015316385127255511
FSPICLK = 32 MHz16.00 MHz10.0 MHz500 kHz257 kHz190.48 kHz125 kHz62.5 kHz31.25 kHz
FSPICLK = 25 MHz12.50 MHz781.25 kHz390.63 kHz145.35 kHz97.66 kHz281.25 kHz48.83 kHz24.41 kHz
FSPICLK = 20 MHz10.00 MHz625 kHz312.50 kHz156.25 kHz116.28 kHz78.13 kHz39.06 kHz19.53 kHz
FSPICLK = 12 MHz6.00 MHz375 MHz187.50 kHz93.75 kHz69.77 kHz46.88 kHz23.44 kHz11.72 kHz
FSPICLK = 10 MHz5.00 MHz312.50 kHz156.25 kHz78.13 kHz58.14 kHz39.06 kHz19.53 kHz9.77kHz
FSPICLK = 8 MHz4.00 MHz250 kHz125 kHz62.50 kHz46.51 kHz31.25 kHz15.63 kHz7.81 kHz
Note:
  1. Not all clock rates are supported. For further information, refer to the SPI timing specifications in the Electrical Characteristics.