19.4.1.8 Framed SPI Modes

The module supports a very basic framed SPI protocol while operating in either Host or Client modes. The following features are provided in the SPI module to support Framed SPI modes:

  • The FRMEN control bit (SPIxCON1[23]) enables Framed SPI mode and causes the SSx pin to be used as a Frame Synchronization pulse input or output pin. The state of SSEN (SPIxCON1[7]) is ignored.
  • The FRMSYNC control bit (SPIxCON1[22]) determines whether the SSx pin is an input or an output (i.e., whether the module receives or generates the Frame Synchronization pulse).
  • The FRMPOL control bit (SPIxCON1[21]) determines the Frame Synchronization pulse polarity for a single SPI clock cycle.
  • The FRMSYPW control bit (SPIxCON1[19]) can be set to configure the width of the Frame Synchronization pulse to one character wide.
The FRMCNT[2:0] control bits (SPIxCON1[18:16]) can be set to configure the number of data characters transmitted per Frame Synchronization pulse.

The following Framed SPI modes are supported by the SPI module:

Frame Host mode

The SPI module generates the Frame Synchronization pulse and provides this pulse to other devices at the SSx pin.

Frame Client mode

The SPI module uses a Frame Synchronization pulse received at the SSx pin.

The Framed SPI modes are supported in conjunction with the Host and Client modes. Therefore, the following Framed SPI mode configurations are available:
  • SPI Host mode and Frame Host mode
  • SPI Host mode and Frame Client mode
  • SPI Client mode and Frame Host mode
  • SPI Client mode and Frame Client mode

These four modes determine whether or not the SPI module generates the serial clock and the Frame Synchronization pulse.

The ENHBUF bit (SPIxCON1[0]) can be configured to use the Standard Buffering mode or Enhanced Buffering mode in Framed SPI mode.

In addition, the SPI module can be used to interface to external audio DAC/ADC and codec devices in Framed SPI mode.

Figure 19-12. SPIx Host, Frame Host Connection Diagram
Note:
  1. In Framed SPI modes, the SSx pin is used to transmit/receive the Frame Synchronization pulse.
  2. Framed SPI modes require the use of all four pins (i.e., using the SSx pin is not optional).
  3. The SPIxTXB and SPIxRXB registers are memory mapped to the SPIxBUF register.