12.10.6 PIE4

Peripheral Interrupt Enable Register 4
Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1 through PIE6.
Name: PIE4
Offset: 0x009A

Bit 76543210 
 RC1IETX1IECLC4IECLC3IECLC2IECLC1IECWG1IENCO1IE 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bit 7 – RC1IE EUSART1 Receive Interrupt Enable

ValueDescription
1 EUSART1 receive interrupts are enabled
0 EUSART1 receive interrupts are disabled

Bit 6 – TX1IE EUSART1 Transmit Interrupt Enable

ValueDescription
1 EUSART1 transmit interrupts are enabled
0 EUSART1 transmit interrupts are disabled

Bit 5 – CLC4IE CLC4 Interrupt Enable

ValueDescription
1 CLC4 interrupts are enabled
0 CLC4 interrupts are disabled

Bit 4 – CLC3IE CLC3 Interrupt Enable

ValueDescription
1 CLC3 interrupts are enabled
0 CLC3 interrupts are disabled

Bit 3 – CLC2IE  CLC2 Interrupt Enable

ValueDescription
1 CLC2 interrupts are enabled
0 CLC2 interrupts are disabled

Bit 2 – CLC1IE CLC1 Interrupt Enable

ValueDescription
1 CLC1 interrupts are enabled
0 CLC1 interrupts are disabled

Bit 1 – CWG1IE CWG1 Interrupt Enable

ValueDescription
1 CWG1 interrupts are enabled
0 CWG1 interrupts are disabled

Bit 0 – NCO1IE NCO1 Interrupt Enable

ValueDescription
1 NCO1 interrupts are enabled
0 NCO1 interrupts are disabled
Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1 through PIE6.