4.9.4.2 Clock Domains

CLK_CPU – CPU Clock

The CPU clock is routed to parts of the system concerned with the operation of the AVR core. Examples of such modules are the general purpose register file, the status register and the data memory holding the stack pointer. Stopping the CPU clock prevents the core from performing general operations and calculations.

CLK_I/O – I/O Clock

Like the timers, the I/O clock is used by most I/O modules. The I/O clock is also used by the external interrupt module but some external interrupts are detected by asynchronous logic, allowing such interrupts to be detected even if the I/O clock is stopped (e.g., in sleep mode).

CLK_NVM – Non-volatile Memory Clock

The NVM clock controls the operation of the Flash (ATA8210 only) and EEPROM interface. The NVM clock usually runs simultaneously with the CPU clock.

CLK_T – Timer Clock

This clock is derived from the same source as the system clock. For more details on the clock and scaling factor selection, see Clock Switching from Related Links.

CLK_DSP – RX DSP Clocks

The clock used for the RX DSP is generated in the internal RX DSP clock control module. It is configured implicitly by the RX DSP settings.

CLK_OUT – Clock Output

The CLK_OUT clock is used to provide a clock reference for external circuitry. The clock output can be derived from three clock sources. The selected clock can be divided by a prescaler and passed to the PB0 pin. Care has to be taken that no configuration is used that leads to an output clock of more than 4.5 MHz. For more details on electrical characteristics, refer to the ATA8210/ATA8215 UHF ASK/FSK Receiver Data Sheet (9344E), section 4.7, parameter number. 15.90. For more details about the clock source selection, see CLKOCR from Related Links. For more details about the output divider settings, see CLKOD from Related Links.