1.1.4 High-Performance Memory Subsystem
(Ask a Question)The following list provides the characteristics of the high-performance memory subsystem:
- 64 KB embedded SRAM (eSRAM)
- Up to 512 KB embedded Non Volatile Memory (eNVM)
- One Serial Peripheral Interface (SPI)/Communication Block (COMM_BLK)
- DDR bridge (2 port data R/W buffering bridge to DDR memory) with 64-bit AXI interface
- Non-blocking, multilayer AHB bus matrix allowing multi-master scheme supporting 5 hosts and 7 clients
- Two AHB/Advanced Peripheral Bus (APB) interfaces to FPGA fabric (host/client capable)
- Two DMA controllers to offload data transactions
- 8-channel Peripheral DMA (PDMA) for data transfer between HPMS peripherals and memory
- High-Performance DMA (HPDMA) for data transfer between eSRAM and DDR memories