20.11.5 TxCLKCON

Timer Clock Source Selection Register
Name: TxCLKCON
Offset: 0x290,0x296,0x29C

Bit 76543210 
     CS[3:0] 
Access R/WR/WR/WR/W 
Reset 0000 

Bits 3:0 – CS[3:0] Timer Clock Source Selection bits

Table 20-3. Clock Source Selection
CS[3:0] Clock Source
Timer2 Timer4 Timer6
1111 Reserved Reserved Reserved
1110 CLC4_out CLC4_out CLC4_out
1101 CLC3_out CLC3_out CLC3_out
1100 CLC2_out CLC2_out CLC2_out
1011 CLC1_out CLC1_out CLC1_out
1010 ZCD1_output ZCD1_output ZCD1_output
1001 NCO1_out NCO1_out NCO1_out
1000 CLKR CLKR CLKR
0111 SOSC SOSC SOSC
0110 MFINTOSC(31.25 kHz) MFINTOSC(31.25 kHz) MFINTOSC(31.25 kHz)
0101 MFINTOSC(500 kHz) MFINTOSC(500 kHz) MFINTOSC(500 kHz)
0100 LFINTOSC LFINTOSC LFINTOSC
0011 HFINTOSC(32 MHz) HFINTOSC(32 MHz) HFINTOSC(32 MHz)
0010 FOSC FOSC FOSC
0001 FOSC/4 FOSC/4 FOSC/4
0000 T2CKIPPS T4CKIPPS T6CKIPPS
ValueDescription
n See the Clock Source Selection table