20.11.6 TxRST

Name: TxRST
Offset: 0x291,0x297,0x29D

Timer External Reset Signal Selection Register

Bit 76543210 
    RSEL[4:0] 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bits 4:0 – RSEL[4:0]

External Reset Source Selection Bits
Table 20-4. External Reset Sources
RSEL[4:0] Reset Source
TMR2 TMR4 TMR6
11111-10001 Reserved Reserved Reserved
10000 CLC4_out CLC4_out CLC4_out
01111 CLC3_out CLC3_out CLC3_out
01110 CLC2_out CLC2_out CLC2_out
01101 CLC1_out CLC1_out CLC1_out
01100 ZCD1_output ZCD1_output ZCD1_output
01011 C2OUT_sync C2OUT_sync C2OUT_sync
01010 C1OUT_sync C1OUT_sync C1OUT_sync
01001 PWM7_out PWM7_out PWM7_out
01000 PWM6_out PWM6_out PWM6_out
00111 CCP4_out CCP4_out CCP4_out
00110 CCP3_out CCP3_out CCP3_out
00101 CCP2_out CCP2_out CCP2_out
00100 CCP1_out CCP1_out CCP1_out
00011 TMR6_postscaled output TMR6_postscaled output Reserved
00010 TMR4_postscaled output Reserved TMR4_postscaled output
00001 Reserved TMR2_postscaled output TMR2_postscaled output
00000 T2INPPS T4INPPS T6INPPS
ValueDescription
n See the External Reset Sources table