39.3.3 Power-Down Current (IPD)(1,2)

Table 39-3. 
PIC16LF18425/45 only
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max. +85°CMax. +125°CUnitsConditions
VDDNote
D200IPDIPD Base—0.082.07μA3.0V
D201IPD_WDTLow-Frequency Internal Oscillator/WDT—0.82.88μA3.0V
D202IPD_SOSCSecondary Oscillator (SOSC)—1.03.89μA3.0V
D203IPD_FVRFVR—467677μA3.0V
D204IPD_BORBrown-out Reset (BOR)—101518μA3.0V
D205IPD_LPBORLow-Power Brown-out Reset (LPBOR)—0.132.28μA3.0V
D207IPD_ADCAADC - Non-converting—0.082.07.0μA3.0VADC not converting (4)
D208IPD_CMPComparator—305758μA3.0V

† - Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPDcurrent from this limit. Max. values may be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in high-impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is FRC.
PIC16F18425/45 only
Standard Operating Conditions (unless otherwise stated), VREGPM = 1
Param. No.Sym.Device CharacteristicsMin.Typ.†Max. +85°CMax. +125°CUnitsConditions
VDDNote
D200IPDIPD Base—0.402.58μA3.0V
D200A—182530μA3.0VVREGPM = 0
D201IPD_WDTLow-Frequency Internal Oscillator/WDT—1.02.99μA3.0V
D202IPD_SOSCSecondary Oscillator (SOSC)—1.24.39.2μA3.0V
D203IPD_FVRFVR—406970μA3.0V
D204IPD_BORBrown-out Reset (BOR)—111619μA3.0V
D207IPD_ADCAADC - Non-converting—0.382.58.0μA3.0VADC not converting (4)
D208IPD_CMPComparator—315859μA3.0V

† - Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPDcurrent from this limit. Max. values may be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in high-impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is FRC.