39.3.3 Power-Down Current (IPD)(1,2)

Table 39-3. 
PIC16LF18425/45 only
Standard Operating Conditions (unless otherwise stated)
Param. No. Sym. Device Characteristics Min. Typ.† Max. +85°C Max. +125°C Units Conditions
VDD Note
D200 IPD IPD Base — 0.08 2.0 7 μA 3.0V
D201 IPD_WDT Low-Frequency Internal Oscillator/WDT — 0.8 2.8 8 μA 3.0V
D202 IPD_SOSC Secondary Oscillator (SOSC) — 1.0 3.8 9 μA 3.0V
D203 IPD_FVR FVR — 46 76 77 μA 3.0V
D204 IPD_BOR Brown-out Reset (BOR) — 10 15 18 μA 3.0V
D205 IPD_LPBOR Low-Power Brown-out Reset (LPBOR) — 0.13 2.2 8 μA 3.0V
D207 IPD_ADCA ADC - Non-converting — 0.08 2.0 7.0 μA 3.0V ADC not converting (4)
D208 IPD_CMP Comparator — 30 57 58 μA 3.0V

† - Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPDcurrent from this limit. Max. values may be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in high-impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is FRC.
PIC16F18425/45 only
Standard Operating Conditions (unless otherwise stated), VREGPM = 1
Param. No. Sym. Device Characteristics Min. Typ.† Max. +85°C Max. +125°C Units Conditions
VDD Note
D200 IPD IPD Base — 0.40 2.5 8 μA 3.0V
D200A — 18 25 30 μA 3.0V VREGPM = 0
D201 IPD_WDT Low-Frequency Internal Oscillator/WDT — 1.0 2.9 9 μA 3.0V
D202 IPD_SOSC Secondary Oscillator (SOSC) — 1.2 4.3 9.2 μA 3.0V
D203 IPD_FVR FVR — 40 69 70 μA 3.0V
D204 IPD_BOR Brown-out Reset (BOR) — 11 16 19 μA 3.0V
D207 IPD_ADCA ADC - Non-converting — 0.38 2.5 8.0 μA 3.0V ADC not converting (4)
D208 IPD_CMP Comparator — 31 58 59 μA 3.0V

† - Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPDcurrent from this limit. Max. values may be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in high-impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is FRC.