30.2.23.2 Control B
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | CTRLB |
| Offset: | 0x0004 |
| Reset: | 0x00000007 |
| Property: | PAC Write Protection, KEY.KEY[7:0] = CFGKEY to unlock when unprotected |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SDALCPU0[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 1 | 1 | |||||||
Bits 1:0 – SDALCPU0[1:0] Set DAL for CPU 0 (M33 Core)
Note: This field can only be updated when PAC Write protection is disabled,
STATUS.BUSY=0, and KEY=<CFGKEY>.
| Value | Description |
|---|---|
| 11 | Do Not Change Setting. |
| 10 | DAL2: Access to all memory. Can debug main CPU code. |
| 01 | DAL1: Reserved by convention (evaluates to DAL0). |
| 00 | DAL0: Access to very limited features. |