15.6.8 Peripheral Interrupt Flag Status and Clear D

This flag is set when a Peripheral Access Error occurs while accessing the peripheral associated with the respective INTFLAGD bit. An interrupt request is generated if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits clears the corresponding INTFLAGC interrupt flag.

Table 15-9. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit — —
Name: INTFLAGD
Offset: 0x20
Reset: 0x00000000
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
        SQI 
Access R/W 
Reset 0 

Bit 0 – SQI Serial Quad Interface