15.6.9 Peripheral Write Protection Status A

Reading the STATUSA register returns the peripheral write protection status of the indicated peripherals:

0: Peripheral is not write protected.

1: Peripheral is write protected.

Table 15-10. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: STATUSA
Offset: 0x34
Reset: 0x00000000
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
 TRAMPACEICRTCWDTFREQMMCLKGCLK 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 OSC32KCTRLOSCCTRLRSTCSUPCPMFCWFCRDSU 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bit 15 – TRAM Trust RAM

Bit 14 – PAC Peripheral Access Controller

Bit 13 – EIC External Interrupt Controller

Bit 12 – RTC Real Time Clock

Bit 11 – WDT Watchdog Timer

Bit 10 – FREQM Frequency Meter

Bit 9 – MCLK Main Clock

Bit 8 – GCLK Generic Clock Controller

Bit 7 – OSC32KCTRL 32 K Oscillator Controller

Bit 6 – OSCCTRL Oscillator Controller

Bit 5 – RSTC Reset Controller

Bit 4 – SUPC Startup Power Controller

Bit 3 – PM Interrupt Flag for the Power Manager

Bit 2 – FCW Flash Controller Write

Bit 1 – FCR Flash Controller Read

Bit 0 – DSU Device Service Unit